In general, for a received data signal to be validated by the active edge of a clock signal, it must be present not only for a minimum time (the "setup time" or tsu) before the arrival of this active edge, but also for another minimum time (the "hold time" or th) after the arrival of this same active edge. The term "active edge" means a transition between two electrical voltages, from a HIGH state to a LOW state (trailing or falling edge), or vice versa (leading edge). The times tsu and th depend on the technology used to manufacture the electronic components, and on the specific circuits used in the stations at the time the data is received. These times are on the order of 10 to 15 ns in length for tsu and 0 to 5 ns for th, in the case of a multivibrator and tristate gate subsystem using what is known as fast technology.
Moreover, a synchronous transmission that uses a synchronizing clock emitted by the central station is embodied in either a monophase mode (that is, the circuits of the transmitter and receiver stations are synchronized at the same leading--or trailing or falling--edge of the clock signal), or a biphase mode (the transmitter and receiver station circuits are synchronized at different leading and trailing or falling edges of the clock signal).
Such synchronous transmissions present problems in the case of long bidirectional linkage. In fact, regardless of the clock frequency, the longer the link, the greater the phase offset of the clock signal in the peripheral station with respect to the central station, for the same pulse. As a result, in the monophase mode, it becomes rapidly impossible to adhere to the th as the line length increases. This is still more difficult given using fast technology shortens the hold time in a given state, HIGH or LOW, of the signals from the transmitter. In practical terms, this technical problem limits, the useful length of the bidirectional links to 50 cm--the back plane or "bottom of the barrel" for data processing systems. Conversely, in the case of biphase transmission from the central station, an offset of the emission of the data signal with respect to the clock signal is obtained, which makes it easy to adhere to the th but contrarily presents problems in the transmission from the peripheral station to the central station in terms of the tsu, which being very fast is not adhered to. One imperfect solution currently used comprises reducing the synchronization frequency, to the detriment of the transmission power.
Thus for high-power, relatively long bidirectional links (several meters in length), resynchronization must be done from the local clock of the receiver via a circuit known as a unifier, which not only increases the number of components (because of the use of two clocks and the unifier circuit) but also introduces a time lag. It is customary to assume that the increase in output attained is always at the cost of a delay in the routing of the data (the output is favored to the detriment of the transmission time).